Epitaxial wafers

2022-05-31 14:47:41 23

Epitaxial wafer (EPI) refers to the semiconductor film grown on the substrate. The film mainly consists of three parts: P-type, quantum well, and N-type. 

Now the mainstream epitaxial material is gallium nitride (GaN), substrate materials are mainly sapphire. 

Silicon, carbonized in three, quantum well general for five usually used production process for metal organic vapor phase epitaxy (MOCVD), which is the core part of the LED industry, requiring higher technology and greater capital investment.

Currently on the silicon substrate can be made ordinary epitaxial layer, multilayer structure epitaxial layer, ultra-high resistance epitaxial layer, ultra-thick epitaxial layer, epitaxial layer resistivity can reach more than a thousand ohms, conductive type: P/P++, N/N++, N/N+, N/N+/N++, N/P/P, P/N/N+ and many other types.

Silicon epitaxial wafers are the core material used to manufacture a wide range of semiconductor devices for consumer, industrial, military and space electronics applications.

Diameter4" 5" 6" 8" 



AdulterationBoron, Phos, Arsenic

Crystal Direction<100>, <111>

Conductivity TypeP/P++, N/N++, N/N+, N/N+/N++, N/P/P, P/N/N+

Resistivity0.001-50 Ohm-cm

Resistivity uniformityStandard<6%, Maximum Capabilities <2%

Epitaxial layer thickness 



Thickness uniformityStandard<3%, Maximum Capabilities <1%
SubstratesCrystal Direction<100>, <111>

Conductivity type / 

Adulteration element

P Type/Boron , N Type/Phos,  N Type/As, N Type/Sb

thickness (um)300-725

Resistivity0.001-100 Ohm-cm

Surface ConditionP/P, P/E



Some of the most important microelectronic applications with multiple production proven and industry standard silicon epitaxy process technologies are.


-Schottky diodes

-Ultrafast diodes

-Zener diodes

-PIN diodes

-Transient voltage suppressors (TVS)

-and others


-Power IGBTs

-Power DMO


-Medium Power

-Small Signal

-and others

Integrated Circuits

Bipolar Integrated Circuits






-and others

For integrated circuit manufacturers Silicon Peak offers silicon epitaxial deposition services with buried ion implantation or diffusion layers on a substrate.

Epitaxy processes can be divided into two main categories based on the growth method (Table 1): full epitaxy (Blanket Epi) and selective epitaxy (Selective Epi, SEG for short). 

Three types of silicon containing gases are commonly used in the process gases: silane (SiH4), dichlorosilane (SiH2Cl2, DCS) and trichlorosilane (SiHCl3, TCS); 

some special epitaxy processes also use Ge and C containing gases germanane (GeH4) and methylsilane (SiH3CH3); 

selective epitaxy processes also need to use the etching gas hydrogen chloride ( HCl), and hydrogen (H2) is generally chosen as the carrier gas in the reaction." ~1 X. i9 V% A7 I

 Epitaxial selectivity is generally achieved by adjusting the relative rates of epitaxial deposition and in-situ etching (in-situ) to achieve the size of the gas used is generally chlorine (Cl) containing silicon source gas DCS, the use of the reaction of Cl atoms in the silicon surface adsorption than the oxide or nitride to achieve epitaxial growth selectivity;

 because SiH4 does not contain Cl atoms and low activation energy, generally only used in low temperature The other common silicon source, TCS, has low vapor pressure, is liquid at room temperature, and needs to be introduced into the reaction cavity by H2 bubbling, but is relatively inexpensive and is often used to grow thicker silicon epitaxial layers by its fast growth rate (up to 5 um/min), which is widely used in the production of silicon epitaxial wafers. 

the lattice constant of group IV elements, Ge (5.646A) and Si The lattice constant (5.431A) of Ge is the least different from that of Si, which makes SiGe easy to integrate with Si processes. 

The SiGe single crystal layer formed by introducing Ge into single crystal Si can reduce the band gap width and increase the characteristic cut-off frequency (fT) of transistors, which makes it widely used in wireless and optical communication high frequency devices; in addition, the lattice stress introduced by the lattice constant mismatch (4%) between Ge and Si is also used in advanced CMOS integrated circuit processes to improve the electron or hole migration.

 In addition, the lattice stress introduced by the lattice constant mismatch between Ge and Si (4%) is used in advanced CMOS integrated circuit processes to increase the mobility of electrons or holes, thus increasing the operating saturation current and response speed of the device, which is becoming a hot topic in the research of semiconductor integrated circuit processes in various countries.

Due to the poor electrical conductivity of intrinsic silicon, whose resistivity is generally above 200ohm-cm, it is usually necessary to dope impurity gases (dopant) while epitaxial growth to meet certain electrical properties of the device. Impurity gases can be divided into N-type and P-type: commonly used N-type impurity gases include phosphorane (PH3) and arsenic alkane (AsH3), while the P-type is mainly borane (B2H6).

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