Wide band semiconductor materials represented by silicon carbide and gallium nitride break through the performance limitations of original semiconductor materials in high power, high frequency, high speed and high temperature environment, and play an important role in 5G communication, Internet of Things, new energy, defense cutting-edge weaponry and other frontier fields. In the context of Moore's Law bottleneck and China's Smart 2025, wide band semiconductor materials are undoubtedly a good opportunity for China's semiconductor industry!
This is how silicon carbide chips are made
New material, "core" future! Silicon carbide chips, instead of traditional silicon-based chips, can effectively improve efficiency, reduce energy loss, reduce carbon emissions, improve system reliability, reduce volume and save space.
Taking electric vehicles as an example, the adoption of silicon carbide chips will reduce the volume of electric drive devices to one-fifth, reduce the driving loss of electric vehicles by more than 60%, and significantly increase the mileage with the same battery capacity.
How will the future-oriented silicon carbide chip be manufactured? This brings us to a concept: metacell. Generally speaking, a chip is a semi-finished product after a wafer has been cut. Each wafer integrates hundreds of chips (the number depends on the size of the chip), and each chip consists of thousands of cells. So how exactly does a metacell have to be manufactured?
The first step
Injecting the mask. The wafer is first cleaned and a thin film of silicon oxide is deposited, followed by the formation of photoresist patterns through the process steps of homogenization, exposure, and development, and finally the patterns are transferred to the etching mask through the etching process.
Ion injection. The masked wafer is placed into the ion implanter and energetic ions are injected. Afterwards, the mask is removed and annealed to activate the injected ions.
Produce the gate. The gate oxygen layer and gate electrode layer are sequentially deposited on the wafer to form the gate-level control structure.
Produce a passivation layer. A dielectric layer with good insulating properties is deposited to prevent inter-electrode breakdown.
Make a drain source electrode. Make a hole in the passivation layer and sputter the metal to form a drain source electrode.
When a positive voltage is applied between the drain source electrode and the gate source electrode, the channel opens and electrons flow from the source to the drain, generating a current flowing from the drain to the source. At this point, a basic power device, i.e., a cell, is made. Thousands of cells make up the chip, which is then integrated into the wafer substrate, and you have a wafer as brilliant as a rainbow!
The wafer's silicon carbide substrate, on the other hand, is prepared by physical vapor phase transport (PVT), which is made by a series of processes including decomposition and sublimation of silicon carbide powder, gas transport and deposition, and cutting and polishing.
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